—Low arithmetic complexity and High speed of
FFT/IFFT processor is required in many applications in
OFDM-based wireless broadband communication systems. For
this reason, it’s essential to develop an optimum complexity
design FFT/IFFT processor to meet the low power and real time
requirements. This paper presents a multiplicative comparison
between developed FFT/IFFTs design and efficient pipeline
radix structures applied for OFDM modulator/demodulator to
be used in IEEE 802.11a and IEEE 802.16a systems. The
proposed design reduces the multiplicative complexity by using
feedback architecture and reduction approach of complex
multiplications. Based on the algorithm and architecture
analysis of developed efficient FFT/IFFTs and comparison
results, the proposed designs reaches low arithmetic complexity,
hence high speed and low power consumption for OFDM-based
wireless broadband communication systems.
—FFT/IFFT, FPGA, IEEE 802.11a, IEEE
802.16a, MDC, OFDM, Radix-n, SDF, WLAN.
M. Arioua is with the National School of Applied Sciences, University of
Abdelmalek Essaadi Tetouan-Tanger, B.P.2222 M'hannech, Morocco
M. M. Hassani is with the Faculty of Science of Marrakech at Cadi Ayyad
University, B.P.511- 40000, Morocco (email: email@example.com).
Cite:M. Arioua and M. M. Hassani, "A Low Multiplicative Complexity of Proposed FFT/IFFTs Design Applied for OFDM-Based Wireless Communication Systems," Journal of Advances in Computer Networks vol. 2, no. 1, pp. 24-27, 2014.